In modern communication applications a low noise, highly stable on-chip local oscillator operating at the carrier frequency is indispensable in radio transceivers. Oscillators with a resonant tank, such as LC oscillators and crystal oscillators, are largely adopted because of their high performance and relatively low power consumption, on top of well-studied design trade-offs and methodologies.
An important design parameter of such oscillators is the oscillation amplitude (also called oscillation swing). The oscillation swing has impact on the phase noise and power consumption of the oscillator. It is also related to the way the next stage is driven. For example, when the oscillation signal swing is low, the oscillator operates in the current limited region and the phase noise improves when the oscillator bias current is increased, until the oscillator enters a voltage limited region, where the oscillation signal swing cannot be further increased and the phase noise starts to degrade. In addition, sufficient signal amplitude must be provided to the following oscillator stage, which is typically a frequency divider or a buffer, to ensure proper operation of the system. On the other hand, the oscillator consumes more power for achieving a larger oscillation amplitude. In practical radio systems, the oscillator swing is determined as the trade-off between the power consumption, phase noise and the requirements of the next stage.
To optimize the performance and power consumption, the oscillation swing needs to be tightly controlled. However, the oscillation signal swing depends on a multitude of factors, including process variation of both the active transistors and the passive devices, variations in the supply voltage of the circuits, as well as the ambient temperature. These factors are usually referred to as the process, voltage and temperature (PVT) variations. The targeted oscillation swing obtained by simulation is rarely the same as the actual swing after fabrication. Sometimes, oscillators even fail to oscillate because the loss in the circuit is larger than estimated due to PVT variations. In oscillators with a wide tuning range, there is an additional problem: the oscillation swing changes with frequency, as a result of frequency-dependent LC tank loss and transistor characteristics. In order to leave a sufficient margin, circuit designers often leave a margin during the design, so that the oscillation signal swing is larger than necessary, with consequently higher power consumption than optimum.
FIG. 1 shows a typical cross-coupled LC oscillator. It contains a passive resonance tank, which can be a parallel LC tank, and a differential transconductor with a tail current source Idc. The LC tank resonates at the desired oscillation frequency, while the transconductor compensates the LC tank loss so that the oscillation can be excited and maintained. The oscillator output signal approaches an ideal sinusoid wave at the resonance frequency. With ideal linear transconductors the oscillation signal swing will grow exponentially over time without bound, which means the oscillation signal swing will approach infinity as time elapses. In reality, due to non-linearity in transistors, the oscillation signal swing is limited by the voltage supply and bias conditions.
More in particular, FIG. 1 shows an LC oscillator based on a NMOS cross-coupled topology. The oscillator 30 comprises a resonance tank 11 and active circuit 12 containing a pair of NMOS transistors M1, M2 and a tail current source 20 which provides a bias current Idc to the transistor pair M1, M2. When oscillation starts, the oscillation amplitude at the output nodes of the oscillator VON,VOP increases, and the signal levels upon the NMOS transistors also increase, i.e. the gate-source voltage amplitudes on M1 and on M2. Due to the non-linearity of the transistors M1 and M2, the amplitude of the voltage Vtail at the tail current source output will increase together with the oscillation amplitude. Therefore, an indication of the high frequency oscillation signal amplitude at the oscillator output is obtained at low frequency from the voltage level of the tail current 20 used for biasing the active transistors. This avoids the usage of additional circuits connected to the output of the oscillator 30 as in conventional designs, where an envelope detector is connected to the output of oscillation circuit VON,VOP, and in turn to the resonance tank 11. The drawback of adding a dedicated envelope detector to the resonance tank 11 is that the input impedance of the envelope detector becomes an extra load for the tank. The resistive loading of the envelope detector degrades the Q-factor of the tank and increases noise and power consumption of the oscillator, while its capacitive loading alters the resonance frequency of the oscillator and degrades the frequency tuning range. In addition, the envelope detector consumes extra power which adds to the overall system power consumption.
The transconductor shown in FIG. 1 is built with NMOS transistors, but it can be replaced by PMOS transistors, or N- or P-type bipolar transistors. Several alternative topologies are available.
Hence, in summary, the conventional approach to obtain the oscillation signal swing is to attach an envelope detector to the oscillator output. Since the envelope detector is connected to the oscillator output, which directly loads the resonance tank, the input impedance of the envelope detector becomes an extra load to the oscillator resonance tank. The resistive loading of the envelope detector degrades the Q-factor of the resonance tank and increases the oscillator's noise and power consumption, while the capacitive loading alters the oscillator resonance frequency and degrades the frequency tuning range. These problems are even more severe in RF applications since the oscillators are increasingly sensitive to parasitics at higher frequencies. In addition, the envelope detectors consume extra power which adds to the overall system power consumption.
The paper “Highly Efficient Class-C CMOS VCOs, Including a Comparison With Class-B VCOs” (L. Fanori & P. Andreani, IEEE Journal Solid-State Circuits, vol. 48, no. 7, July 2013, pp. 1730-1740) presents two class-C Voltage Controlled Oscillators with a dynamic bias of the core transistors, which maximizes the oscillation amplitude without compromising the robustness of the oscillation start-up. In this way it provides a solution to the well-known trade-off encountered in a class-C VCO. To detect the start-up of oscillation the tail current voltage is used.
The paper “Amplitude detection inside CMOS LC oscillators” (P. Kinget, IEEE Int'l Symposium on Circuits and Systems 2006) demonstrates that an intrinsic amplitude detector exists in negative resistance CMOS LC oscillators. The DC bias on the common-mode node in CMOS VCOs depends on the oscillation amplitude. The paper describes how this DC bias (i.e. the tail current voltage) can be used as an intrinsic detector for the oscillation amplitude.
However, what is missing in the prior art solutions is that the oscillator device design should take into account that the local oscillator swing is influenced by process, voltage and temperature variations. Consequently, there is a need for an appropriate way to monitor the output swing and to regulate it.